1. Field of the Invention
The present invention relates generally to methods and apparatuses for packaging semiconductor dice to a carrier substrate. More specifically, the present invention relates to semiconductor dice bonded to a carrier substrate and encapsulated using the same dielectric material as the underfill and encapsulant, as well as to methods of manufacturing such assemblies.
2. State of the Art
Electronic devices—a combination of a plurality of electronic components, such as resistors, capacitors, inductors, transistors, and the like, fabricated as integrated circuits and mechanically and electrically interconnected by conductive paths and mounted to a carrier substrate, such as a printed circuit board (PCB)—are essential components of modern life found in equipments or technologies ranging from every day items, such as televisions, microwaves, and simple digital clocks, to all sorts of sophisticated medical equipment, computers, airplanes, and satellites. As these different technologies become more and more sophisticated and advanced, the manufacturers of electronic devices in the form of integrated circuits fabricated on semiconductor dice are faced with the conflicting requirement of packing significantly higher numbers of electronic components on substrates that continue to shrink in size because of the ever-increasing desire for component and equipment miniaturization. Therefore, as the size of semiconductor dice decrease with each generation, a greater precision is required in placing and connecting the different electronic components to the substrates while, at the same time, finding ways to reduce the time required to manufacture these components continues to be a priority.
Initially, electronic components were mounted to printed circuit boards by feeding component leads through predrilled holes and soldering the leads to the contact pads on the circuit board. Such a mounting approach made it simple to remove and repair defective components by melting the previously deposited solder, removing the inoperative element, and soldering a new one in its place. As the size of integrated circuits decreased and the number of components in a board increased, surface mounting technologies were developed to allow the electronic elements to be mounted directly to the surface of the printed circuit board, thus reducing the size of contact pads and their proximity in the board. The flip-chip technology is a conventional integrated circuit packaging approach that allows the overall package to be made very compact. Other examples of conventional packaging technology include Chip-On-Board (“COB”) or Board-On-Chip (“BOC”) technology, wherein a semiconductor die is attached directly to a carrier substrate, such as an interposer or printed circuit board. Electrical and mechanical interconnection used in COB or BOC technology may include flip-chip attachment techniques, wire bonding techniques, or tape automated bonding (“TAB”) techniques.
A flip-chip package configuration includes at least one semiconductor chip or die mounted in an active surface-down manner over a substrate carrier or another semiconductor chip electrically and mechanically coupled to the same by means of conductive bumps. Several materials are typically used to form the conductive bumps, such as conductive or conductor-filled polymers, solder, etc. If the conductive bumps are solder bumps, the solder bumps are reflowed to form solder joints that are secured to bond pads on the flip-chip mounting, or active, surface. However, due to the presence of the bumps between the flip-chip and the substrate carrier or other semiconductor chip, a gap exists between the substrate and the active surface of the flip-chip. Also, a typical problem of flip-chip packages is the fact that the materials used to make the electronic components, the solder, and the circuit board have different coefficients of thermal expansion. During operation, increases in temperature will typically cause a circuit board to expand more than the component or chip mounted thereto, while cooling produces the opposite result. The net effect of such temperature cycling is that the solder joints are strained, resulting in early fracture failures.
A solution to this problem of strained solder joints is the use of a dielectric underfill or barrier material between the carrier substrate and the electronic component. Initially, a flux, generally a no-clean, low-residue flux, is placed on the semiconductor chip or carrier substrate to facilitate joining of the integrated circuit to the carrier substrate. Then the underfill or barrier material is introduced between the semiconductor chip and the carrier substrate. An underfill can be thought of as an adhesive that mechanically couples the low-expansion chip to the high-expansion substrate, including any solder joints or other conductive structures therebetween. Conventionally, the use of underfill materials was typically limited to use with assemblies that included flip-chip type connections or other devices with ball grid array (BGA) connection patterns (e.g., BGA packages). Flux residues that remain in the gap between the semiconductor chip and carrier substrate reduce the adhesive and cohesive strengths of the underfill-encapsulating adhesive, affecting the reliability of the assembly.
Furthermore, in order to protect and seal an assembly that includes underfill material, a different, curable, encapsulating material is typically deposited over the package after the underfill is dispensed and cured. Encapsulating materials include epoxy, silicone, polyimide, and room temperature vulcanizing (“RTV”) materials. The reflowing of the solder bumps and underfilling and curing the underfill material and encapsulant is a multistep process that results in reduced productivity and yield, making the assembly of encapsulated flip-chip printed circuit boards a time-consuming, labor-intensive, and expensive process with a number of uncertainties. As chip assembly becomes better understood and reliable packaging methods become available in the marketplace, mounting methods that increase productivity are highly desirable. Underfill and encapsulation processes are clearly bottlenecks to increased productivity in the manufacturing of flip-chip electronic devices.
Several problems exist with the use of underfill from a manufacturing perspective. In methods that rely on capillary effects to fill the gap between the semiconductor die and the substrate, the challenge is to avoid the creation of bubbles, air pockets, or voids in the underfill material. If voiding occurs, any solder bumps that exist in the voided area will be subjected to thermal fatigue as if the underfill material were not present. Preventing voids in the underfill material is governed by the material characteristics, such as viscosity, rheology, and filler content, and the method used for application. U.S. Pat. No. 5,218,234 to Thompson et al. discloses a semiconductor assembly whereby an epoxy underfill is accomplished by applying the epoxy around the perimeter of the flip-chip mounted on the substrate and allowing the epoxy to flow underneath the chip. Alternatively, the underfill can be accomplished by backfilling the gap between the flip-chip and the substrate through a hole in the substrate beneath the chip. Such a method increases the manufacturing time because of the need to wait for the epoxy to cure and also increases cost because of the specialized substrate configuration needed. In addition, with larger-size semiconductor chips, the limiting effect of capillary action becomes more critical and makes the encapsulation procedure more time consuming, more susceptible to void formation, and more susceptible to the separation of the polymer from the fillers during application.
Barnerji et al. (U.S. Pat. No. 5,203,076) discloses the use of a vacuum chamber to apply underfill material to the gap between the semiconductor chip and the carrier substrate. A bead of underfill polymeric material is dispensed on the substrate around the periphery of the chip and a vacuum is applied to force the underfill into the gap. Such an approach also adds to the manufacturing cost because of the additional equipment, in particular the vacuum chamber, needed to implement it.
Most underfill application methods use a heated dispensing zone. Subsequently, the assembly is first conveyed to a cooling zone to allow the underfill to at least partially solidify, the assembly being later heated again to complete the curing process. However, in order to increase production rates, the assembly may be prematurely removed from the heated dispensing zone and the underfill may not have been completely drawn into the gap between the semiconductor chip and the carrier substrate. It is understood by those of ordinary skill in the art that properly executing the foregoing process increases the manufacturing time while providing inadequate underfill dispense time and may reduce yield.
An ongoing problem associated with the use of wire bonding in packaging occurs during a transfer molding encapsulation process of the semiconductor die in what is known as “wire sweep.” Wire sweep results when a wave front of dielectric (commonly a silicon-filled polymer) encapsulation material moving through a mold cavity across the semiconductor die and carrier substrate assembly forces bond wires to contact adjacent bond wires and become fixedly molded in such a contacted position after the encapsulation material sets. When wire sweep occurs, the contacting bond wire interconnections of a semiconductor die to a carrier substrate short circuit, resulting in a nonfunctional semiconductor die assembly. Wire sweep may also result in bond wire breakage or disconnection from a bond pad or terminal.
Yet another problem with conventional techniques is that of bleed, or “flash,” of molding compound introduced into a mold cavity to form a dielectric encapsulant over the die and carrier substrate, which problem particularly manifests itself in the case of BOC-type assemblies wherein bond pads of a semiconductor die accessed through an opening in a carrier substrate are wire bonded prior to encapsulation. Under certain conditions, such as where the die fails to overlap the opening sufficiently, pressure of the molding compound in conjunction with the configuration of the assembly causes the molding compound to bleed, or “flash,” out of the mold cavity.
Accordingly, a method and apparatus to dispense a dielectric substance that would act as underfill as well as encapsulation material in the packaging of semiconductor dice would be advantageous, particularly if such method and apparatus would eliminate the problems associated with the creation of bubbles, air pockets, or voids, reduce the manufacturing time and increase yield by reducing the number of steps to complete the manufacturing process, and substantially eliminate the problem of wire sweep and molding compound bleed.